Upcoming Tradeshows, Conferences and Webinars

Name Date Time Location/Registration
DVConMarch 2-4, 20152:30 PM - 7:30 PM

Booth #402

DVCon Luncheon: What is Needed to Drive Design Efficiency?March 212:00 - 1:30 PM

Pine/Cedar Room

Double Tree Hotel, San Jose, CA

DVCon - Poster SessionMarch 3, 201510:30 - 11:00 AM

Title: Closing Functional and Structural Coverage on RTL Generated by HLS


Author: Bryan Bowyer from Calypto


Location: Gateway Foyer

DATEMarch 9-13, 2015

TitleClock Domain Crossing Aware Sequential Clock Gating

From Samsung: Jianfeng Liu, Mi-Suk Hong, Kyungtae Do,
JungYun Choi, and Jaehong Park

From Calypto: Abhishek Ranjan, Manish
Kumar, Mohit Kumar, and Nikhil Tripathi


Location: Grenoble, FRANCE