Products
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Power Optimization
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Functional Verification
- SLEC System •
- SLEC System-HLS •
- SLEC RTL •
- SLEC CG •
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White Papers
PowerPro CG automates RTL power optimization.
Benefits of PowerPro CG
- Reduces power with little or no impact on timing or area
- Automatically identifies sequential clock gating opportunities
- Fits into existing RTL design flows
- Power savings are cumulative and complementary to downstream tools
- Verifiable results using SLEC CG or simulation
Based on Calypto’s patented Sequential Analysis Technology, PowerPro CG reduces power by up to 60%. PowerPro CG evaluates circuit behavior across multiple clock cycles to identify sequential clock gating enable conditions. New enable logic is inserted into the original RTL code while maintaining all user defined pragmas and comments.
PowerPro CG consistently produces better results in significantly less time than manual clock gating. PowerPro CG saves more power than traditional combinational clock gating tools by turning off a larger number of registers for longer durations. The results from PowerPro CG are complimentary and cumulative to low-power RTL synthesis tools.
The PowerPro Analyzer is a graphical visualization tool with hyperlinked source code, schematics and clock-gating views that allows users to rapidly navigate and analyze the power optimizations generated by PowerPro CG.
Reduces Power up to 60%
Datasheet
English (145 kb pdf)
Japanese (577 kb pdf)White Papers
Automating Sequential Clock Gating
Utilizing Clock-Gating Efficiency to Reduce Power in RTL Designs
In the News
03/24/08 - SOC Central - Calypto Releases PowerPro CG 2.0
02/18/08 - STARC Reduces SoC Design Power with Calypto’s Unique PowerPro CG Product (Japanese Version)
01/06/08 - Portable Design - Designing Energy-Efficient Consumer Electronics
12/14/07 - EDN - EDN Hot 100 Products of 2007
11/05/07 - Electronic Design - Stanch The Bleeding Of Leakage Power At 65 nm
04/10/07 - EETimes - Calypto power optimizer supports CPF
03/26/07 - EETimes - Power tool taps clock gating